CPC H04N 19/126 (2014.11) [H04N 19/132 (2014.11); H04N 19/176 (2014.11); H04N 19/18 (2014.11); H04N 19/463 (2014.11); H04N 19/61 (2014.11); H04N 19/96 (2014.11); H04N 19/70 (2014.11)] | 20 Claims |
1. An image processing device comprising:
circuitry configured to:
decode scaling list data to generate a first quantizing matrix of a first size;
generate a second quantizing matrix for a transform block of a second size, to which zeroing of a high-frequency component is applied, by referring to only a partial matrix of the first quantizing matrix generated by the circuitry, when a size of at least one direction of the second quantizing matrix is larger than an upper limit of size to which zeroing of high-frequency components is not applied; and
inversely quantize a quantized transform coefficient of the transform block of the second size, using the second quantizing matrix generated by the circuitry, wherein the second quantizing matrix is generated by resampling the first quantizing matrix.
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