US 12,177,161 B2
Integrated circuit for controlling radio communication
Atsushi Matsumoto, Ishikawa (JP); Daichi Imamura, Saitama (JP); Takashi Iwai, Ishikawa (JP); Yoshihiko Ogawa, Kanagawa (JP); Tomofumi Takata, Ishikawa (JP); and Katsuhiko Hiramatsu, Kanagawa (JP)
Assigned to Panasonic Holdings Corporation, Osaka (JP)
Filed by Panasonic Holdings Corporation, Osaka (JP)
Filed on Nov. 14, 2023, as Appl. No. 18/509,025.
Application 18/509,025 is a continuation of application No. 17/728,848, filed on Apr. 25, 2022, granted, now 11,863,496.
Application 17/728,848 is a continuation of application No. 17/035,125, filed on Sep. 28, 2020, granted, now 11,343,051, issued on May 24, 2022.
Application 17/035,125 is a continuation of application No. 15/862,429, filed on Jan. 4, 2018, granted, now 10,826,668, issued on Nov. 3, 2020.
Application 15/862,429 is a continuation of application No. 15/244,692, filed on Aug. 23, 2016, granted, now 9,893,867, issued on Feb. 13, 2018.
Application 15/244,692 is a continuation of application No. 14/927,159, filed on Oct. 29, 2015, granted, now 9,473,277, issued on Oct. 18, 2016.
Application 14/927,159 is a continuation of application No. 13/654,280, filed on Oct. 17, 2012, granted, now 9,219,586, issued on Dec. 22, 2015.
Application 13/654,280 is a continuation of application No. 13/402,311, filed on Feb. 22, 2012, granted, now 8,315,642, issued on Nov. 20, 2012.
Application 13/402,311 is a continuation of application No. 12/968,139, filed on Dec. 14, 2010, granted, now 8,145,231, issued on Mar. 27, 2012.
Application 12/968,139 is a continuation of application No. 12/673,482, granted, now 8,125,953, issued on Feb. 28, 2012, previously published as PCT/JP2008/002212, filed on Aug. 13, 2008.
Claims priority of application No. 2007-211548 (JP), filed on Aug. 14, 2007; and application No. 2008-025535 (JP), filed on Feb. 5, 2008.
Prior Publication US 2024/0089065 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 5/00 (2006.01); H04L 27/26 (2006.01); H04W 72/0453 (2023.01); H04W 72/1268 (2023.01); H04W 72/23 (2023.01); H04W 72/542 (2023.01); H04J 11/00 (2006.01); H04W 84/04 (2009.01)
CPC H04L 5/0057 (2013.01) [H04L 5/001 (2013.01); H04L 5/0012 (2013.01); H04L 5/0048 (2013.01); H04L 5/005 (2013.01); H04L 5/0051 (2013.01); H04L 5/0062 (2013.01); H04L 27/2657 (2013.01); H04L 27/2662 (2013.01); H04W 72/0453 (2013.01); H04W 72/1268 (2013.01); H04W 72/23 (2023.01); H04W 72/542 (2023.01); H04J 11/0023 (2013.01); H04W 84/042 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit to control a process, the process comprising:
transmitting, in at least one mode of operation, control information related to a mapping of a reference signal to a plurality of frequency resources in a frequency band, the frequency band having a variable transmission bandwidth within a system bandwidth, the variable transmission bandwidth being provided between control channels mapped to both ends of the system bandwidth, wherein each of the plurality of frequency resources is of a fixed bandwidth and the plurality of frequency resources are uniformly distributed in the frequency band and a time domain according to the variable transmission bandwidth; and
receiving, in at least the one mode of operation, receives the reference signal, which is mapped to the plurality of frequency resources based on the control information.