CPC H01L 29/7869 (2013.01) [H01L 29/42384 (2013.01)] | 10 Claims |
1. A semiconductor device comprising:
an insulating substrate;
a first insulating layer disposed above the insulating substrate;
an island-shaped oxide semiconductor disposed on the first insulating layer;
a second insulating layer which covers the oxide semiconductor;
a gate electrode disposed on the second insulating layer;
a source electrode and a drain electrode, which are in contact with the oxide semiconductor,
the oxide semiconductor including:
a first edge portion intersecting the gate electrode;
a second edge portion on an opposite side to the first edge portion, which intersects the gate electrode;
a first area extending along a first direction between the first edge portion and the second edge portion and overlapping the gate electrode;
a second area located between the first area and the source electrode and along the first edge portion;
a third area located between the first area and the source electrode and along the second edge portion;
a fourth area located between the first area and the drain electrode and along the first edge portion;
a fifth area located between the first area and the drain electrode and along the second edge portion;
a sixth area surrounded by the first area, the second area and the third area; and
a seventh area surrounded by the first area, the fourth area, and the fifth area, and
the first area, the second area, the third area, the fourth area and the fifth area having a higher resistance as compared to the sixth area and the seventh area.
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