CPC H01L 29/66795 (2013.01) [H01L 21/02183 (2013.01); H01L 21/02186 (2013.01); H01L 21/02194 (2013.01); H01L 21/823431 (2013.01); H01L 29/785 (2013.01)] | 20 Claims |
1. A method of manufacturing a semiconductor device, comprising:
forming a sacrificial gate structure over a channel region of the semiconductor device;
forming sidewall spacer layers over sidewalls of the sacrificial gate structure;
removing the sacrificial gate structure to form a gate space;
forming a high-k gate dielectric layer in the gate space;
forming a first work function metal layer over the high-k gate dielectric layer in the gate space;
forming a first oxygen absorbing layer over the first work function metal layer;
forming a second work function metal layer over the first oxygen absorbing layer,
wherein the second work function metal layer comprises a plurality of second work function metal layers;
forming a second oxygen absorbing layer between adjacent second work function metal layers; and
forming a gate electrode metal layer over the second work function metal layer,
wherein the first work function metal layer, second work function metal layer, oxygen absorbing layer, and gate electrode metal layer are formed of different materials.
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