US 12,176,370 B2
Stacked structure for CMOS image sensors including through-substrate-via contacting negative bias circuit
Min-Feng Kao, Chiayi (TW); Dun-Nian Yaung, Taipei (TW); Jen-Cheng Liu, Hsin-Chu (TW); Wen-Chang Kuo, Tainan (TW); Sheng-Chau Chen, Tainan (TW); Feng-Chi Hung, Chu-Bei (TW); and Sheng-Chan Li, Tainan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 2, 2021, as Appl. No. 17/336,852.
Claims priority of provisional application 63/142,029, filed on Jan. 27, 2021.
Prior Publication US 2022/0238568 A1, Jul. 28, 2022
Int. Cl. H01L 27/146 (2006.01)
CPC H01L 27/1463 (2013.01) [H01L 27/14636 (2013.01); H01L 27/14683 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming an image sensor, comprising:
forming a conductive feature on a frontside of a semiconductor substrate;
patterning the semiconductor substrate to form a backside isolation trench and a backside connecting trench in a pixel region such that the backside isolation trench and the backside connecting trench intersect;
patterning a through hole extending through the semiconductor substrate in a peripheral region laterally offset from the pixel region;
providing a first conductive layer to form a backside isolation structure in the backside isolation trench, and a backside connecting structure in the backside connecting trench;
forming a through dielectric liner over a backside surface of the backside isolation structure and the backside connecting structure, wherein the through dielectric liner is formed extending into the through hole;
providing a second conductive layer to form a through substrate via in the through hole to contact the conductive feature;
forming a conductive bridge over a backside surface of the through substrate via and a backside surface of the backside connecting structure.