US 12,176,349 B2
Semiconductor device and method of manufacture
Wan-Yi Kao, Baoshan Township (TW); Hung Cheng Lin, Hsinchu (TW); Chunyao Wang, Zhubei (TW); Yung-Cheng Lu, Hsinchu (TW); and Chi On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 15, 2023, as Appl. No. 18/335,637.
Application 18/335,637 is a division of application No. 17/157,182, filed on Jan. 25, 2021, granted, now 11,764,221.
Claims priority of provisional application 63/058,654, filed on Jul. 30, 2020.
Prior Publication US 2023/0326927 A1, Oct. 12, 2023
Int. Cl. H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/0924 (2013.01) [H01L 21/823431 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a hybrid dielectric fin, the hybrid dielectric fin comprising:
a bulk material with a first carbon concentration; and
a blocking layer lining the bulk material, the blocking layer having a second carbon concentration less than the first carbon concentration;
a semiconductor fin adjacent to the hybrid dielectric fin, wherein the hybrid dielectric fin has a top surface that is planar with the semiconductor fin;
a gate dielectric layer adjacent to the semiconductor fin; and
a shallow trench isolation extending from the semiconductor fin to the blocking layer.