CPC H01L 23/49838 (2013.01) [G02B 6/4202 (2013.01); G02B 6/4274 (2013.01); H01L 21/7684 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16055 (2013.01); H01L 2224/16112 (2013.01); H01L 2224/16148 (2013.01); H01L 2924/19033 (2013.01)] | 20 Claims |
1. A manufacturing method of a semiconductor package, comprising:
forming a supporting layer over a redistribution structure;
performing a first planarization process over the supporting layer;
forming a lower dielectric layer over the supporting layer, wherein the lower dielectric layer comprises a concave revealing a device mounting region of the supporting layer;
forming a first sacrificial layer over the supporting layer, wherein the sacrificial layer filling the concave;
performing a second planarization process over the lower dielectric layer and the first sacrificial layer;
providing a transition waveguide over the lower dielectric layer;
removing the first sacrificial layer;
mounting a semiconductor device over the device mounting region, wherein the semiconductor device comprises a device waveguide is optically coupled to the transition waveguide.
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