US 12,176,279 B2
Package structure and manufacturing method thereof
Sung-Yueh Wu, Chiayi County (TW); Chien-Ling Hwang, Hsinchu (TW); Jen-Chun Liao, Taipei (TW); Ching-Hua Hsieh, Hsinchu (TW); Pei-Hsuan Lee, Tainan (TW); and Chia-Hung Liu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 27, 2023, as Appl. No. 18/359,909.
Application 18/359,909 is a continuation of application No. 17/199,348, filed on Mar. 11, 2021, granted, now 11,756,872.
Prior Publication US 2023/0378040 A1, Nov. 23, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/495 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/49827 (2013.01) [H01L 21/4857 (2013.01); H01L 21/486 (2013.01); H01L 23/3128 (2013.01); H01L 23/49822 (2013.01); H01L 23/49833 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73253 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a carrier substrate comprising through carrier vias (TCV);
a die disposed over the carrier substrate, wherein the die comprises a semiconductor substrate and conductive posts disposed over the semiconductor substrate, and the conductive posts face away from the carrier substrate; and
an encapsulant laterally encapsulating the die.