US 12,176,261 B2
Method of fabricating package structure
Chih-Hao Chen, Taipei (TW); Chin-Fu Kao, Taipei (TW); Li-Hui Cheng, New Taipei (TW); and Szu-Wei Lu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 21, 2023, as Appl. No. 18/356,227.
Application 17/586,800 is a division of application No. 16/745,338, filed on Jan. 17, 2020, granted, now 11,239,134, issued on Feb. 1, 2022.
Application 18/356,227 is a continuation of application No. 17/586,800, filed on Jan. 28, 2022, granted, now 11,756,855.
Prior Publication US 2023/0360995 A1, Nov. 9, 2023
Int. Cl. H01L 23/367 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/3675 (2013.01) [H01L 21/4853 (2013.01); H01L 21/4882 (2013.01); H01L 21/563 (2013.01); H01L 21/6835 (2013.01); H01L 23/3185 (2013.01); H01L 24/16 (2013.01); H01L 2221/68354 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/18161 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure, comprising:
a circuit substrate;
a device disposed on and electrically connected to the circuit substrate, the device comprising a plurality of semiconductor dies laterally encapsulated by an insulating encapsulation;
a metal layer covering and directly contacting back surfaces of the plurality of semiconductor dies and a top surface of the insulating encapsulation, wherein the metal layer comprises a first portion covering the top surface and second portions covering side surfaces of the insulating encapsulation;
a lid disposed on the circuit substrate; and
a thermal interface material layer, wherein the lid is adhered to the metal layer through the thermal interface material layer.