US 12,176,058 B2
Memory device having switching device of page buffer and erase method thereof
Jung-Chuan Ting, Hsinchu County (TW); and I-Chen Yang, Miaoli County (TW)
Assigned to MACRONIX International Co., Ltd., Hsinchu (TW)
Filed by MACRONIX International Co., Ltd., Hsinchu (TW)
Filed on Sep. 26, 2022, as Appl. No. 17/953,094.
Prior Publication US 2024/0105239 A1, Mar. 28, 2024
Int. Cl. G11C 16/14 (2006.01); G11C 7/06 (2006.01); G11C 7/10 (2006.01); G11C 7/12 (2006.01); G11C 16/16 (2006.01)
CPC G11C 7/1057 (2013.01) [G11C 7/067 (2013.01); G11C 7/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device having a switching device for a page buffer, comprising:
a plurality of switching units coupled between a memory cell array and a sense amplification circuit of a page buffer,
wherein each of the plurality of switching units further comprises:
a high voltage element and a low voltage element that are connected in series to each other;
a first end of the high voltage element is coupled to the sense amplification circuit, and a first end of the low voltage element is coupled to a common source line of the memory cell array; and
a second end of the high voltage element and a second end of the low voltage element are connected to each other and coupled to a corresponding bit line of the memory cell array, wherein
the common source line coupled to each of the plurality of switching units shares a common active region.