US 12,175,244 B2
Nested loop control
Kai Chirca, Dallas, TX (US); Timothy D. Anderson, University Park, TX (US); Todd T. Hahn, Sugar Land, TX (US); and Alan L. Davis, Sugar Land, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Nov. 13, 2023, as Appl. No. 18/507,222.
Application 18/507,222 is a continuation of application No. 17/367,384, filed on Jul. 4, 2021, granted, now 11,816,485.
Application 17/367,384 is a continuation of application No. 16/422,823, filed on May 24, 2019, granted, now 11,055,095, issued on Jul. 6, 2021.
Prior Publication US 2024/0086193 A1, Mar. 14, 2024
Int. Cl. G06F 9/30 (2018.01)
CPC G06F 9/30065 (2013.01) [G06F 9/3013 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a memory configured to store a set of instructions that includes a first instruction and a second instruction;
a processor core coupled to the memory that includes a set of functional units configured to execute the set of instructions, wherein the set of functional units includes a first functional unit and a second functional unit;
a counter coupled to the processor core;
a comparator coupled to the counter;
a set of serially-coupled latches coupled to the comparator, wherein each latch of the set of serially-coupled latches includes an output; and
a multiplexer that includes a set of inputs coupled to the outputs of the set of serially-coupled latches, wherein:
the first functional unit is configured to, based on the first instruction, cause the multiplexer to provide a predicate value; and
the second functional unit is configured to determine whether to execute the second instruction based on the predicate value.