US 12,175,115 B2
Memory device and method for monitoring the performances of a memory device
Alberto Troia, Munich (DE); and Antonino Mondello, Messina (IT)
Filed by Lodestar Licensing Group LLC, Evanston, IL (US)
Filed on Oct. 6, 2023, as Appl. No. 18/482,539.
Application 18/482,539 is a continuation of application No. 17/961,373, filed on Oct. 6, 2022, granted, now 11,782,633.
Application 17/961,373 is a continuation of application No. 16/624,512, granted, now 11,467,761, issued on Oct. 11, 2022, previously published as PCT/IB2019/000451, filed on May 31, 2019.
Prior Publication US 2024/0028246 A1, Jan. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01)
CPC G06F 3/0653 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0611 (2013.01); G06F 3/0616 (2013.01); G06F 3/0619 (2013.01); G06F 3/064 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
storing, in a dummy row associated with a first memory block of an array of memory cells, internal block variables and a known pattern;
performing a reading of the dummy row;
comparing a result of the reading with the known pattern;
updating content of the dummy row periodically based on the comparison;
updating the content, for a portion of a plurality of memory blocks comprising a second memory block, in response to the portion being subject to same environmental variation conditions as the first memory block; and
trimming parameters of the reading based at least in part on a result of the comparison and the updated content.