CPC G06F 3/0647 (2013.01) [G06F 3/0614 (2013.01); G06F 3/0635 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] | 25 Claims |
1. An apparatus comprising:
a first memory device; and
control circuitry coupled with the first memory device and configured to cause the apparatus to:
receive, from a host device, a command associated with a write operation;
determine whether to use a data migration technique for transferring data from a second memory device to the first memory device in a tri-level write format or a quad-level write format based at least in part on receiving the command;
select the tri-level write format instead of the quad-level write format for transferring the data from the second memory device to the first memory device based at least in part on a timing to complete transferring the data from the second memory device to the first memory device in the quad-level write format and determining to use the data migration technique;
transfer the data from the second memory device to the first memory device in the tri-level write format based at least in part on selecting the tri-level write format;
write the data to the first memory device using the tri-level write format based at least in part on selecting the tri-level write format; and
convert the data from the tri-level write format to the quad-level write format based at least in part on writing the data.
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