US 12,174,775 B1
Apparatuses, systems, and methods for multi-lane data bus inversion
Padmini Nujetti, Markham (CA); Chao Yu, Markham (CA); Michael Tresidder, Austin, TX (US); and Daniel McLean, Markham (CA)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US); and ATI Technologies ULC, Markham (CA)
Filed on Dec. 19, 2022, as Appl. No. 18/083,738.
Int. Cl. G06F 13/42 (2006.01)
CPC G06F 13/4204 (2013.01) 17 Claims
OG exemplary drawing
 
16. A system for multi-lane data bus inversion, the system comprising:
a data bus;
a data bus encoder, wherein the data bus encoder is configured to:
receive data for transmission via a plurality of data lanes, each data lane corresponding to one of a plurality of inversion bits; and
an inversion target circuit configured to:
for each of one or more permutations of the plurality of inversion bits, calculate an average toggle number corresponding to a number of bits across the plurality of data lanes set to toggle with respect to a previous transmission;
select a permutation from the one or more permutations having the corresponding average toggle number within a target toggle rate window defined by a minimum toggle rate and a maximum toggle rate, wherein the data bus encoder is further configured to, for each data lane within the plurality of data lanes, apply the corresponding inversion bit to each bit within the data lane; and
dynamically adjust the target toggle rate window;
a data bus decoder that decodes each data lane within the plurality of data lanes according to the corresponding inversion bit; and
at least one transmitter and at least one receiver, wherein the at least one transmitter transmits the data for transmission to the at least one receiver.