US 12,174,659 B2
FSM based clock switching of asynchronous clocks
Atul Ramakant Lele, Bangalore (IN); Dirk Preikszat, Freising (DE); Gregory North, Austin, TX (US); Robin Osa Hoel, Oslo (NO); and Tarjei Aaberge, Nesoya (NO)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on May 25, 2022, as Appl. No. 17/824,695.
Prior Publication US 2023/0384820 A1, Nov. 30, 2023
Int. Cl. G06F 1/10 (2006.01); G06F 1/08 (2006.01); G06F 1/12 (2006.01)
CPC G06F 1/12 (2013.01) [G06F 1/08 (2013.01); G06F 1/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a clock switching circuit coupled to oscillators and one or more circuit units, the clock switching circuit configured to:
receive, from the oscillators, a set of frequency signals;
provide an uplink primary clock signal and an enable signal to the one or more circuit units, the enable signal determined synchronously with the uplink primary clock signal;
receive, from the one or more circuit units or a clock management circuit, a clock frequency request;
provide the uplink primary clock signal based on a first signal of the set of frequency signals; and
according to the clock frequency request, determine whether to continue to provide the uplink primary clock signal based on the first signal or on a second signal of the set of frequency signals.