US 12,174,529 B2
Method for manufacturing semiconductor device
Wei-Chung Hu, New Taipei (TW); Chi-Ta Lu, Yilan County (TW); and Chi-Ming Tsai, Taipei (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Jul. 6, 2022, as Appl. No. 17/810,861.
Application 17/810,861 is a continuation of application No. 17/115,496, filed on Dec. 8, 2020, granted, now 11,429,019.
Application 17/115,496 is a continuation of application No. 16/182,951, filed on Nov. 7, 2018, granted, now 10,866,508, issued on Dec. 15, 2020.
Claims priority of provisional application 62/673,349, filed on May 18, 2018.
Prior Publication US 2022/0342296 A1, Oct. 27, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 30/30 (2020.01); G03F 1/70 (2012.01); G03F 7/00 (2006.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 119/18 (2020.01)
CPC G03F 1/70 (2013.01) [G03F 7/70633 (2013.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 2119/18 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
providing a first layout including a plurality of metal line features;
determining a modified second layout having a target score, wherein the modified second layout includes a plurality of modified via features separated from each other, and each of the plurality of modified via features respectively entirely overlaps each of the plurality of metal line features, wherein a width and a length of each of the modified via features are different from a width and a length of each of the plurality of metal line features; and
outputting the modified second layout to a photomask.