US 12,174,441 B2
Integration of OE devices with ICS
Robert Kalman, Mountain View, CA (US); Bardia Pezeshki, Mountain View, CA (US); Cameron Danesh, Mountain View, CA (US); and Alexander Tselikov, Mountain View, CA (US)
Assigned to AvicenaTech, Corp., Sunnyvale, CA (US)
Filed by AvicenaTech Corp., Mountain View, CA (US)
Filed on Oct. 24, 2023, as Appl. No. 18/493,232.
Application 18/493,232 is a division of application No. 17/497,742, filed on Oct. 8, 2021, granted, now 11,822,138.
Claims priority of provisional application 63/089,188, filed on Oct. 8, 2020.
Prior Publication US 2024/0053558 A1, Feb. 15, 2024
Int. Cl. G02B 6/43 (2006.01); G02B 6/42 (2006.01); H01L 25/16 (2023.01)
CPC G02B 6/43 (2013.01) [G02B 6/4214 (2013.01); H01L 25/167 (2013.01); G02B 6/4246 (2013.01)] 5 Claims
OG exemplary drawing
 
1. An optical interconnect comprising:
a first waveguide on top of an interconnect layer of an integrated circuit (IC) chip, the IC chip comprising an optical interconnect IC, the IC chip including a semiconductor substrate and an interconnect layer on top of the semiconductor substrate;
an optical transmitter embedded in the first waveguide, the optical transmitter comprising a microLED having a bottom connected to a pad coupled to a first electrical signal path in the interconnect layer, a top contact of the microLED coupled to a second electrical signal path in the interconnect layer;
transmit circuitry in the semiconductor substrate of the optical interconnect IC, the transmit circuitry configured to drive the microLED;
a photodetector in the semiconductor substrate of the IC chip, under a level of the interconnect layer, the optical receiver optically coupled to the first waveguide;
receive circuitry in the semiconductor substrate of the optical interconnect IC, the receive circuitry coupled to the photodetector; and
wherein a region of the interconnect layer above the photodetector has no metal layers; and
wherein the microLED has an emitting region of less than 10 microns by 10 microns.