CPC G01R 31/2834 (2013.01) [G01R 31/31908 (2013.01)] | 20 Claims |
1. Device under test (DUT) simulation equipment, comprising:
a first circuit board comprising a first field programmable gate array (FPGA);
a second circuit board comprising a processor; and
a power distribution board;
wherein the first circuit board is connected to the power distribution board, the power distribution board power is configured to supply power to the first circuit board, the second circuit board is connected to the power distribution board, and the power distribution board is configured to supply power to the second circuit board;
wherein the first circuit board is communicatively connected to the second circuit board;
wherein the DUT simulation equipment is configured to store an intellectual property (IP) core corresponding to a simulated DUT;
wherein, when the DUT simulation equipment is connected to a tester configured to perform testing by outputting a test signal, the DUT simulation equipment is configured to simulate a performance of a DUT by providing a response signal after receiving the test signal from the tester; and
wherein only the first circuit board is configured to receive the test signal from the tester, and the second circuit board is configured to control the first circuit board using a control signal.
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