CPC H10N 60/805 (2023.02) [G06N 10/00 (2019.01); H10N 60/0156 (2023.02); H10N 60/0912 (2023.02); H10N 60/12 (2023.02); H10N 69/00 (2023.02)] | 18 Claims |
1. A quantum processor comprising:
a first superconductive programmable device comprising a first type of material that has a respective critical temperature at which the first type of material superconducts, the respective critical temperature of the first type of material being an intrinsic property of the first type of material, the first superconductive programmable device comprising at least one first superconducting wiring layer and a first Josephson junction, the at least one first superconducting wiring layer comprising one or more first superconducting traces, and each of the at least one first superconducting wiring layer and the first Josephson junction comprising the first type of material;
a second superconductive device comprising a second type of material that has a respective critical temperature at which the second type of material superconducts, the respective critical temperature of the second type of material being an intrinsic property of the second type of material, the respective critical temperature of the second type of material being different from the respective critical temperature of the first type of material, the second superconductive device comprising at least one second superconducting wiring layer, the at least one second superconducting wiring layer comprising one or more second superconducting traces comprising the second type of material, and the first superconductive programmable device is more susceptible to noise than the second superconductive device; and
an insulative dielectric, the insulative dielectric separating at least a portion of the first superconductive programmable device from at least a portion of the second superconductive device.
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