US 11,856,862 B2
Fatigue-free bipolar loop treatment to reduce imprint effect in piezoelectric device
Chi-Yuan Shih, Hsinchu (TW); Shih-Fen Huang, Jhubei (TW); You-Ru Lin, New Taipei (TW); and Yan-Jie Liao, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Jul. 27, 2022, as Appl. No. 17/874,446.
Application 17/874,446 is a continuation of application No. 16/534,330, filed on Aug. 7, 2019, granted, now 11,456,330.
Prior Publication US 2022/0367564 A1, Nov. 17, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10N 39/00 (2023.01); H10N 30/074 (2023.01); H10N 30/20 (2023.01)
CPC H10N 39/00 (2023.02) [H10N 30/074 (2023.02); H10N 30/206 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
applying a first set of one or more voltage pulses to a piezoelectric device over a first time period;
during the first time period, determining whether a performance parameter of the piezoelectric device has a first value that deviates from a reference value by more than a predetermined value; and
based on whether the first value deviates from the reference value by more than the predetermined value, selectively applying a second set of one or more voltage pulses to the piezoelectric device over a second time period, the second time period being after the first time period and second set of one or more voltage pulses differing in magnitude and/or polarity from the first set of one or more voltage pulses.