US 11,856,788 B2
Semiconductor device and method of fabricating the same
Tzu-Yu Chen, Kaohsiung (TW); Sheng-Hung Shih, Hsinchu (TW); Fu-Chen Chang, New Taipei (TW); Kuo-Chi Tu, Hsinchu (TW); Wen-Ting Chu, Kaohsiung (TW); and Alexander Kalnitsky, San Francisco, CA (US)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Mar. 4, 2021, as Appl. No. 17/192,227.
Prior Publication US 2022/0285376 A1, Sep. 8, 2022
Int. Cl. H01L 21/00 (2006.01); H10B 53/30 (2023.01); H01L 49/02 (2006.01)
CPC H10B 53/30 (2023.02) [H01L 28/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for fabricating a semiconductor device, comprising:
depositing a bottom electrode layer over a substrate;
depositing a ferroelectric layer over the bottom electrode layer;
depositing a noble metal layer over the ferroelectric layer;
depositing a non-noble metal layer over the noble metal layer, wherein the non-noble metal layer is free of noble metal; and
removing portions of the non-noble metal layer, the noble metal layer, the ferroelectric layer, and the bottom electrode layer to form a memory stack, the memory stack comprising remaining portions of the non-noble metal layer, the noble metal layer, the ferroelectric layer, and the bottom electrode layer.