US 11,855,658 B1
Efficient hard decision decoding of generalized Reed-Solomon codes in presence of erasures and errors within the singleton bound
Amit Berman, Suwon-si (KR); Avner Dor, Suwon-si (KR); Yaron Shany, Suwon-si (KR); Ilya Shapir, Suwon-si (KR); and Ariel Doubchak, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 5, 2022, as Appl. No. 17/882,306.
Int. Cl. H03M 13/00 (2006.01); H03M 13/15 (2006.01); H03M 13/11 (2006.01)
CPC H03M 13/1515 (2013.01) [H03M 13/1108 (2013.01); H03M 13/1545 (2013.01); H03M 13/1575 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system for hard decision decoding of Reed-Solomon codewords, the system comprising:
an interface that receives a Reed-Solomon codeword over a channel, the Reed-Solomon codeword comprising a plurality of symbols;
a processing circuit comprising at least one decoder that implements a process for decoding the Reed-Solomon codeword, wherein the processing circuit is configured to:
construct a first locator polynomial for the Reed-Solomon codeword to identify locations of erasures in the Reed-Solomon codeword;
determine a first syndrome of the Reed-Solomon codeword;
calculate a first error evaluator polynomial from the first syndrome and the first locator polynomial;
perform error detection based on the first error evaluator polynomial to detect a presence of errors in the Reed-Solomon codeword; and
when the presence of errors in the Reed-Solomon codeword is not detected in the error detection, bypassing, by the at least one decoder, updating the first locator polynomial and proceed to completing decoding of the Reed-Solomon codeword, or
when the presence of errors in the Reed-Solomon codeword is detected in the error detection, updating, by the at least one decoder, the first locator polynomial to a second locator polynomial before completing decoding of the Reed-Solomon codeword.