US 11,855,648 B2
Clock pattern detection and correction
Gaurav Malhotra, Cupertino, CA (US)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Apr. 14, 2022, as Appl. No. 17/720,671.
Claims priority of provisional application 63/299,467, filed on Jan. 14, 2022.
Prior Publication US 2023/0231561 A1, Jul. 20, 2023
Int. Cl. H03D 3/24 (2006.01); H03L 7/08 (2006.01); G06F 9/448 (2018.01); H04L 7/033 (2006.01)
CPC H03L 7/0807 (2013.01) [G06F 9/4498 (2018.02); H04L 7/0331 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A clock and data recovery (CDR) system, comprising:
a correlator configured to:
receive data;
determine a first value of the received data; and
output a second value corresponding to the received data;
an accumulator configured to:
generate an accumulation value by accumulating the second value output from the correlator; and
output the accumulation value;
a state machine configured to determine whether a repeating pattern is present in the CDR system based on the accumulation value; and
a loop filter configured to use one value from among a third value stored in a leaky integrator and a fourth value stored in a delay line, based on the determination by the state machine.