US 11,855,638 B2
Optical latch circuit and electronic device
Ryosuke Isogai, Tokyo (JP); Yoshifumi Yoshida, Tokyo (JP); and Fumiyasu Utsunomiya, Tokyo (JP)
Assigned to Seiko Group Corporation, Toyko (JP); and ABLIC INC, Nagano (JP)
Appl. No. 17/441,643
Filed by SEIKO GROUP CORPORATION, Tokyo (JP); and ABLIC Inc., Tokyo (JP)
PCT Filed Jan. 22, 2020, PCT No. PCT/JP2020/002111
§ 371(c)(1), (2) Date Sep. 21, 2021,
PCT Pub. No. WO2020/195064, PCT Pub. Date Oct. 1, 2020.
Claims priority of application No. 2019-057819 (JP), filed on Mar. 26, 2019.
Prior Publication US 2022/0352877 A1, Nov. 3, 2022
Int. Cl. H03K 3/42 (2006.01)
CPC H03K 3/42 (2013.01) 20 Claims
OG exemplary drawing
 
1. An optical latch circuit, comprising:
a voltage detector configured to compare a first power generation voltage input from a first input terminal with a preset first threshold voltage and start to output a set signal from a determination output terminal when the first power generation voltage exceeds the first threshold voltage;
a first photovoltaic element connected between the first input terminal and a grounding point in a forward direction in a photovoltaic mode and configured to output the first power generation voltage to the first input terminal according to photovoltaic power when light is radiated; and
a feedback resistor inserted between the first input terminal and the determination output terminal,
wherein the voltage detector is configured to only consume a power generated by the first photovoltaic element to start to output the set signal.