CPC H03K 19/0005 (2013.01) [G11C 7/1048 (2013.01)] | 29 Claims |
1. A semiconductor apparatus comprising:
a command generation circuit configured to generate a first internal command signal and a second internal command signal, which are generated on the basis of a data command signal for a data driving operation;
an impedance setting circuit enabled on the basis of the first internal command signal, and configured to set impedance into which a reference resistance is reflected;
an information mapping circuit configured to map voltage drop information corresponding to a current consumed during the data driving operation according to data pattern information, and provide the voltage drop information to the impedance setting circuit; and
a data driving circuit enabled on the basis of the second internal command signal, and configured to perform the data driving operation on the basis of the set impedance.
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