US 11,855,597 B2
Amplifier circuitry
Sameer Baveja, Edinburgh (GB); and Hamed Sadati, Edinburgh (GB)
Assigned to Cirrus Logic Inc., Austin, TX (US)
Filed by Cirrus Logic International Semiconductor Ltd., Edinburgh (GB)
Filed on May 10, 2022, as Appl. No. 17/741,180.
Application 17/741,180 is a continuation of application No. 17/028,059, filed on Sep. 22, 2020, granted, now 11,368,134.
Claims priority of provisional application 62/911,586, filed on Oct. 7, 2019.
Claims priority of application No. 1915936 (GB), filed on Nov. 1, 2019.
Prior Publication US 2022/0271722 A1, Aug. 25, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H03F 3/45 (2006.01); H03F 1/26 (2006.01); H03F 1/52 (2006.01)
CPC H03F 3/45479 (2013.01) [H03F 1/26 (2013.01); H03F 1/52 (2013.01); H03F 2200/03 (2013.01); H03F 2200/153 (2013.01); H03F 2200/78 (2013.01)] 17 Claims
OG exemplary drawing
 
1. Circuitry for monitoring for amplifier instability, comprising:
an amplifier, comprising:
a first signal path between an amplifier input and an amplifier output; and
a feedback path from the amplifier output to form a feedback loop with at least part of the first signal path; and
a comparator, comprising:
a first input configured to receive a first signal derived from a first amplifier node which is part of said feedback loop; and
a second input configured to receive a second signal derived from a second amplifier node which varies with the signal at the amplifier input but is outside of said feedback loop;
wherein the comparator is configured to compare the first signal to the second signal and generate a comparison signal and wherein in the event of amplifier instability the comparison signal comprises a characteristic indicative of amplifier instability;
wherein the amplifier comprises an input gain stage and one or more subsequent gain stages and the first amplifier node comprises an input node to one said subsequent gain stage and the second amplifier node comprises a reference node for that subsequent gain stage.