US 11,855,188 B2
Source/drain formation with reduced selective loss defects
Chih-Chiang Chang, Zhubei (TW); Ming-Hua Yu, Hsinchu (TW); and Li-Li Su, Chubei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 30, 2022, as Appl. No. 17/809,963.
Application 17/809,963 is a continuation of application No. 17/157,444, filed on Jan. 25, 2021, granted, now 11,444,181.
Claims priority of provisional application 63/055,385, filed on Jul. 23, 2020.
Prior Publication US 2022/0328660 A1, Oct. 13, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/66 (2006.01); H01L 21/20 (2006.01); H01L 21/8234 (2006.01); H01L 27/092 (2006.01); H01L 29/417 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/66795 (2013.01) [H01L 21/20 (2013.01); H01L 21/823431 (2013.01); H01L 27/0924 (2013.01); H01L 29/41791 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a first semiconductor fin and a first dielectric fin in an n-type Fin Field-Effect (FinFET) region;
forming a second semiconductor fin and a second dielectric fin in a p-type FinFET region;
forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin;
performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin;
removing the first epitaxy mask, wherein when the removing the first epitaxy mask is stopped, a remaining portion of the first epitaxy mask remains on the second dielectric fin;
forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin;
performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin; and
removing the second epitaxy mask and the remaining portion of the first epitaxy mask.