US 11,855,100 B2
Multilevel semiconductor device and structure with oxide bonding
Zvi Or-Bach, Haifa (IL); Deepak C. Sekar, Sunnyvale, CA (US); and Brian Cronquist, Klamath Falls, OR (US)
Assigned to Monolithic 3D Inc., Klamath Falls, OR (US)
Filed by Monolithic 3D Inc., Klamath Falls, OR (US)
Filed on Apr. 18, 2023, as Appl. No. 18/136,335.
Application 18/136,335 is a continuation in part of application No. 18/102,710, filed on Jan. 28, 2023, granted, now 11,694,922.
Application 18/102,710 is a continuation in part of application No. 17/868,776, filed on Jul. 20, 2022, granted, now 11,594,526, issued on Feb. 28, 2023.
Application 17/868,776 is a continuation in part of application No. 17/717,094, filed on Apr. 10, 2022, granted, now 11,437,368, issued on Sep. 6, 2022.
Application 17/717,094 is a continuation in part of application No. 17/492,627, filed on Oct. 3, 2021, granted, now 11,327,227, issued on May 10, 2022.
Application 17/492,627 is a continuation in part of application No. 17/330,186, filed on May 25, 2021, granted, now 11,163,112, issued on Nov. 2, 2021.
Application 17/330,186 is a continuation in part of application No. 17/189,201, filed on Mar. 1, 2021, granted, now 11,063,071, issued on Jul. 13, 2021.
Application 17/189,201 is a continuation in part of application No. 17/121,726, filed on Dec. 14, 2020, granted, now 10,978,501, issued on Apr. 13, 2021.
Application 17/121,726 is a continuation in part of application No. 17/027,217, filed on Sep. 21, 2020, granted, now 10,943,934, issued on Mar. 9, 2021.
Application 17/027,217 is a continuation in part of application No. 16/860,027, filed on Apr. 27, 2020, granted, now 10,833,108, issued on Nov. 10, 2020.
Application 16/860,027 is a continuation in part of application No. 15/920,499, filed on Mar. 14, 2018, granted, now 10,679,977, issued on Jun. 9, 2020.
Application 15/920,499 is a continuation in part of application No. 14/936,657, filed on Nov. 9, 2015, granted, now 9,941,319, issued on Apr. 10, 2018.
Application 14/936,657 is a continuation in part of application No. 13/274,161, filed on Oct. 14, 2011, granted, now 9,197,804, issued on Nov. 24, 2015.
Application 13/274,161 is a continuation in part of application No. 12/904,103, filed on Oct. 13, 2010, granted, now 8,163,581, issued on Apr. 24, 2012.
Prior Publication US 2023/0253408 A1, Aug. 10, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/12 (2006.01); H01L 21/762 (2006.01); H01L 25/18 (2023.01); H01L 27/15 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2023.01); G02B 6/12 (2006.01); H01L 33/00 (2010.01)
CPC H01L 27/1203 (2013.01) [G02B 6/12004 (2013.01); H01L 21/76254 (2013.01); H01L 24/32 (2013.01); H01L 25/167 (2013.01); H01L 25/18 (2013.01); H01L 27/15 (2013.01); H01L 24/05 (2013.01); H01L 24/16 (2013.01); H01L 33/0093 (2020.05); H01L 2224/05655 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A multi-level semiconductor device, the device comprising:
a first level comprising integrated circuits;
a second level comprising a structure designed to conduct electromagnetic waves,
wherein said second level is disposed above said first level,
wherein said integrated circuits comprise single crystal transistors; and
an oxide layer disposed between said first level and said second level,
wherein said integrated circuits comprise at least one memory circuit,
wherein said second level is bonded to said oxide layer, and
wherein said bonded comprises oxide to oxide bonds.