US 11,855,040 B2
Ion implantation with annealing for substrate cutting
Huicheng Chang, Tainan (TW); Jyh-Cherng Sheu, Hsinchu (TW); Chen-Fong Tsai, Hsinchu (TW); Yun Chen Teng, New Taipei (TW); Han-De Chen, Hsinchu (TW); and Yee-Chia Yeo, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Oct. 8, 2021, as Appl. No. 17/497,050.
Claims priority of provisional application 63/187,558, filed on May 12, 2021.
Prior Publication US 2022/0367410 A1, Nov. 17, 2022
Int. Cl. H01L 21/265 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01)
CPC H01L 24/83 (2013.01) [H01L 21/265 (2013.01); H01L 21/6835 (2013.01); H01L 21/7806 (2013.01); H01L 25/50 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a transistor structure of a device on a first semiconductor substrate;
forming a front-side interconnect structure over a front side of the transistor structure;
bonding a carrier substrate to the front-side interconnect structure;
after bonding the carrier substrate to the front-side interconnect structure, implanting ions into the first semiconductor substrate to form an implantation region of the first semiconductor substrate;
removing the first semiconductor substrate, wherein removing the first semiconductor substrate comprises:
applying an annealing process to separate the implantation region from a remainder region of the first semiconductor substrate; and
forming a back-side interconnect structure over a back side of the transistor structure.