US 11,855,013 B2
Semiconductor device
Se-Ho You, Seoul (KR); Seongho Shin, Hwaseong-si (KR); and Bangweon Lee, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jun. 7, 2022, as Appl. No. 17/834,020.
Application 17/834,020 is a continuation of application No. 17/121,898, filed on Dec. 15, 2020, granted, now 11,380,635.
Claims priority of application No. 10-2020-0049074 (KR), filed on Apr. 23, 2020.
Prior Publication US 2022/0302052 A1, Sep. 22, 2022
Int. Cl. H01L 23/66 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/66 (2013.01) [H01L 24/20 (2013.01); H01L 2223/6616 (2013.01); H01L 2223/6677 (2013.01); H01L 2924/1421 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate, a bottom surface of the substrate including first and second regions spaced apart from each other;
a first semiconductor chip buried in the substrate, the first semiconductor chip having a first active surface that is directed to a top surface of a core portion of the substrate;
a first antenna pattern provided on the top surface of the substrate and electrically connected to the first semiconductor chip;
a second antenna pattern provided on the first region of the bottom surface of the substrate; and
outer terminals provided on the second region of the bottom surface of the substrate,
wherein the first antenna pattern is connected to first chip pads, which are provided on the first active surface of the first semiconductor chip, through an upper buildup portion of the substrate,
wherein the second antenna pattern is connected to the first chip pads of the first semiconductor chip through a vertical connection terminal, which extends from a bottom surface of the upper buildup portion of the substrate to a top surface of a lower buildup portion of the substrate, and
wherein the first active surface of the first semiconductor chip is in contact with the upper buildup portion.