CPC H01L 23/5283 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H10B 41/20 (2023.02); H10B 41/27 (2023.02); H10B 43/10 (2023.02); H10B 43/20 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02); H10B 43/50 (2023.02)] | 20 Claims |
1. A semiconductor device comprising:
a substrate including a cell array region and a connection region; and
a stack structure including a first stack and a second stack on the first stack, each of the first and second stacks including at least three electrodes vertically stacked,
wherein the first stack has a first length in a first direction, the second stack has a second length in the first direction, and the second length is shorter than the first length, and
wherein each of the first and second stacks has a sloped sidewall defined by sidewalls of the at least three electrodes.
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