US 11,854,893 B2
Method of manufacturing semiconductor package
Junyun Kweon, Cheonan-si (KR); Jumyong Park, Cheonan-si (KR); Solji Song, Suwon-si (KR); Dongjoon Oh, Suwon-si (KR); Chungsun Lee, Asan-si (KR); and Hyunsu Hwang, Siheung-si (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jun. 27, 2022, as Appl. No. 17/850,714.
Claims priority of application No. 10-2021-0127088 (KR), filed on Sep. 27, 2021.
Prior Publication US 2023/0096678 A1, Mar. 30, 2023
Int. Cl. H01L 21/78 (2006.01); H01L 21/02 (2006.01); H01L 23/00 (2006.01)
CPC H01L 21/78 (2013.01) [H01L 21/0206 (2013.01); H01L 24/80 (2013.01); H01L 24/94 (2013.01); H01L 24/97 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/94 (2013.01); H01L 2224/97 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor package, comprising:
forming a mask layer on a wafer, the wafer including a semiconductor substrate and an insulating layer;
forming a groove in the semiconductor substrate by performing a first laser grooving process;
expanding an opening of the mask layer opened by the first laser grooving process by performing a second laser grooving process;
exposing a portion of the insulating layer by removing a portion of the mask layer; and
cutting the semiconductor substrate while removing the portion of the insulating layer exposed during the exposing by performing a dicing process.