US 11,854,882 B2
Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnects
Kevin Lin, Beaverton, OR (US); Robert L. Bristol, Portland, OR (US); and Richard E. Schenker, Portland, OR (US)
Assigned to Tahoe Research, Ltd., Dublin (IE)
Filed by Tahoe Research, Ltd., Dublin (IE)
Filed on Oct. 30, 2020, as Appl. No. 17/085,882.
Application 17/085,882 is a division of application No. 16/093,076, granted, now 10,867,853, previously published as PCT/US2016/034624, filed on May 27, 2016.
Prior Publication US 2021/0050261 A1, Feb. 18, 2021
Int. Cl. H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 21/76897 (2013.01) [H01L 21/76816 (2013.01); H01L 21/76832 (2013.01); H01L 21/76837 (2013.01); H01L 21/76885 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 21/7682 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A method of fabricating a back end of line (BEOL) metallization layer for a semiconductor structure, the method comprising:
forming a metal layer above a substrate;
performing a first photobucket process to form one or more conductive vias in the metal layer;
performing a second photobucket process to form one or more cut locations in the metal layer;
performing a third photobucket process to form one or more conductive tabs in the metal layer; and
subtractively etching a plurality of metal lines in the metal layer, the plurality of metal lines coupled to the one or more conductive vias, coupled to the one or more conductive tabs, and having a continuity broken by the one or more cut locations.