US 11,854,864 B2
Semiconductor device including trench isolation layer and method of forming the same
Juyeon Kim, Hwaseong-si (KR); Hanmei Choi, Hwaseong-si (KR); Sukjin Chung, Hwaseong-si (KR); Bongjin Kuh, Hwaseong-si (KR); Changyong Kim, Hwaseong-si (KR); and Hakyu Seong, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 18, 2021, as Appl. No. 17/530,169.
Application 17/530,169 is a continuation of application No. 16/780,810, filed on Feb. 3, 2020, granted, now 11,211,284.
Claims priority of application No. 10-2019-0064330 (KR), filed on May 31, 2019.
Prior Publication US 2022/0084873 A1, Mar. 17, 2022
Int. Cl. H01L 21/762 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/76229 (2013.01) [H01L 21/02126 (2013.01); H01L 21/02164 (2013.01); H01L 21/02238 (2013.01); H01L 21/76237 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor device, the method comprising:
forming, on a substrate, a plurality of trenches defining a plurality of patterns, the plurality of trenches including a plurality of first trenches and a second trench adjacent one of the plurality of first trenches, the plurality of patterns including a first pattern between the second trench and the one of the plurality of first trenches, and the second trench having a different depth from the one of the plurality of first trenches adjacent thereto;
deforming the first pattern by forming a leaning control layer on side walls and bottoms of the plurality of trenches, wherein the first pattern is deformed to lean in a direction away from second trench and toward the one of the plurality of first trenches; and
forming a gap-fill insulating layer on the leaning control layer,
wherein the forming the leaning control layer comprises
forming a preliminary liner on the side walls and the bottoms of the plurality of trenches, and
oxidizing the preliminary liner using an oxidation process.