US 11,854,642 B2
Memory test methods and related devices
Heng-Chia Chang, Hefei (CN); Li Ding, Hefei (CN); and Chuanqi Shi, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Anhui (CN)
Appl. No. 17/310,414
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Anhui (CN)
PCT Filed Oct. 15, 2020, PCT No. PCT/CN2020/121289
§ 371(c)(1), (2) Date Jul. 31, 2021,
PCT Pub. No. WO2021/179600, PCT Pub. Date Sep. 16, 2021.
Claims priority of application No. 202010167406.4 (CN), filed on Mar. 11, 2020.
Prior Publication US 2022/0343994 A1, Oct. 27, 2022
Int. Cl. G11C 29/46 (2006.01); G11C 29/44 (2006.01); G11C 29/56 (2006.01)
CPC G11C 29/46 (2013.01) [G11C 29/4401 (2013.01); G11C 29/56004 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A memory test method, comprising:
testing a second memory to acquire defect information of the second memory;
storing the defect information of the second memory;
acquiring repair information of the second memory according to the defect information of the second memory;
repairing the second memory according to the repair information of the second memory;
testing a first memory to acquire defect information of the first memory;
acquiring repair information of the first memory according to the defect information of the first memory; and
storing the repair information of the first memory in the second memory.