CPC G11C 16/08 (2013.01) [G11C 11/5628 (2013.01); G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/3459 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02)] | 18 Claims |
1. An apparatus comprising:
a plurality of word lines comprising a plurality of word line zones;
a plurality of non-volatile memory cells coupled to the plurality of word lines; and
a control circuit coupled to the non-volatile memory cells, the control circuit configured to determine a corresponding initial program voltage for each of the word line zones, wherein each corresponding initial program voltage is determined based on a number of program erase cycles,
wherein for each word line zone, the control circuit is configured to determine the corresponding initial program voltage based on an average increase of a programmed state threshold voltage position across word lines in the word line zone.
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