CPC G11C 11/40607 (2013.01) [G11C 11/4093 (2013.01); G11C 11/40615 (2013.01); G11C 16/16 (2013.01); G11C 16/3409 (2013.01)] | 20 Claims |
1. A controller for controlling a nonvolatile memory device, the controller comprising:
a host interface configured to receive a refresh scan request from a host device;
a processor configured to control the nonvolatile memory device to perform a refresh scan operation on a plurality of memory blocks in response to the refresh scan request, and transmit a result of the refresh scan operation to the host device through the host interface; and
a memory interface configured to transmit a refresh operation command for performing a refresh operation to the nonvolatile memory device in response to a refresh operation request received from the host device,
wherein the result of the refresh scan operation includes device health information indicating at least one of a read count, an erase count, or a failed bit count.
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