US 11,854,311 B2
Comparison of biometric identifiers in memory
Honglin Sun, Boise, ID (US); Glen E. Hush, Boise, ID (US); and Richard C. Murphy, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 1, 2022, as Appl. No. 18/073,296.
Application 18/073,296 is a continuation of application No. 16/533,423, filed on Aug. 6, 2019, granted, now 11,556,759.
Prior Publication US 2023/0103659 A1, Apr. 6, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06V 40/70 (2022.01); H01L 27/118 (2006.01); G06N 3/045 (2023.01); G06N 3/065 (2023.01); G06V 10/764 (2022.01); G06N 3/08 (2023.01)
CPC G06V 40/70 (2022.01) [G06N 3/045 (2023.01); G06N 3/065 (2023.01); G06V 10/764 (2022.01); H01L 27/11807 (2013.01); G06N 3/08 (2013.01); H01L 2027/11838 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a second layer of a memory device stacked on a first layer of the memory device, wherein an array of memory cells is formed in the second layer;
the first layer within which a plurality of logic blocks are formed in complementary metal-oxide-semiconductor (CMOS) under the array; and
a controller coupled to the plurality of logic blocks, wherein the controller is configured to:
control a first portion of the plurality of logic blocks to receive a first subset of a set of biometric identifiers from the array and to perform a first comparison operation thereon; and
control a second portion of the logic blocks to receive a second subset of the set of biometric identifiers from the array and to perform a second comparison operation thereon;
wherein the first and second subsets of the biometric identifiers are different biometric identifiers; and
wherein the first and second comparison operations are performed to determine a match of the first and second subsets respectively to a stored template.