CPC G06N 3/063 (2013.01) [G06F 7/57 (2013.01); G06N 3/08 (2013.01)] | 19 Claims |
1. A neural network apparatus that processes an operation, the neural network apparatus comprising:
neural network circuitry configured to,
map i and j such that an ith bit of an n-bit data and a ith bit of an m-bit data are differently combined for respective instances of performing the operation, wherein n is a natural number and i is a natural number between 1 and n inclusive, and wherein m is a natural number and j is a natural number between 1 and m inclusive;
receive, for each of the respective instances, a first input corresponding to the ith bit of the n-bit data;
receive, for each of the respective instances, a second input corresponding to the jth bit of the m-bit data;
perform, for each of the respective instances, a determination whether the operation is to be performed on the ith bit and the jth bit; and
based on the determination being a positive determination,
perform the operation on the ith bit and the jth bit, and
produce each bit of an operation value of the operation performed on the ith bit and the ith bit based on the determination.
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