CPC G06F 30/394 (2020.01) [G06F 30/39 (2020.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 30/3947 (2020.01); G06F 30/3953 (2020.01)] | 20 Claims |
1. A method comprising:
performing routing and pin assignment for a chip design layout, one or more objects of the chip design layout being associated with a routing database and a pin assignment database stored in memory, wherein the one or more objects are stored in a design database including one or more identifiers indicating the association between the one or more objects and the routing database or the pin assignment database;
detecting a change associated with the one or more objects of the chip design layout;
updating, via one or more processors, at least one of the routing database or the pin assignment database stored in the memory in response to the detected change and based on the association between the one or more objects and the routing database or pin assignment database stored in the design database, wherein the one or more objects include one or more pin constraint objects; and
performing another routing and pin assignment based on the updated at least one of the routing database or the pin assignment database.
|