US 11,853,665 B2
Performing hardware description language transformations
Parijat Biswas, Bangalore (IN); Minakshi Chakravorty, Bengaluru (IN); and Sitikant Sahu, Bangalore (IN)
Assigned to Synopsys, Inc., Sunnyvale, CA (US)
Filed by Synopsys, Inc., Mountain View, CA (US)
Filed on Sep. 30, 2021, as Appl. No. 17/490,700.
Claims priority of provisional application 63/088,087, filed on Oct. 6, 2020.
Prior Publication US 2022/0108056 A1, Apr. 7, 2022
Int. Cl. G06F 30/323 (2020.01)
CPC G06F 30/323 (2020.01) 17 Claims
OG exemplary drawing
 
1. A method, comprising:
parsing hardware description language (HDL) code for an integrated circuit (IC) design to obtain an IC design parse tree;
parsing a transformation pattern to obtain a transformation pattern parse tree, the transformation pattern comprising a first pattern and a second pattern wherein the first pattern and the second pattern are specified using a language extension of the HDL;
using the IC design parse tree and the transformation pattern parse tree to identify a portion of the HDL code that matches the first pattern;
transforming, by a processor, the portion of the HDL code based on the second pattern to obtain a transformed portion of the HDL code; and
replacing the portion of the HDL code by the transformed portion of the HDL code.