US 11,853,241 B2
Interrupt controller and method of managing an interrupt controller
Jawad Benhammadi, Pont de Claix (FR); and Sylvain Meyer, Grenoble (FR)
Assigned to STMICROELECTRONICS (ALPS) SAS, Grenoble (FR); and STMICROELECTRONICS (GRENOBLE 2) SAS, Grenoble (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR); and STMicroelectronics (Alps) SAS, Grenoble (FR)
Filed on Dec. 13, 2022, as Appl. No. 18/065,475.
Application 18/065,475 is a continuation of application No. 17/229,307, filed on Apr. 13, 2021, granted, now 11,550,744.
Claims priority of application No. 2003733 (FR), filed on Apr. 14, 2020.
Prior Publication US 2023/0113667 A1, Apr. 13, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 13/24 (2006.01); G06F 13/16 (2006.01); G06F 21/85 (2013.01); H03K 19/20 (2006.01); G06F 1/3237 (2019.01)
CPC G06F 13/24 (2013.01) [G06F 1/3237 (2013.01); G06F 13/1689 (2013.01); G06F 21/85 (2013.01); H03K 19/20 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
an input interface for receiving at least one interrupt signal from at least one item of equipment external to the device;
a clock input for receiving an external clock signal; and
a first controller connected to the input interface and to the clock input, the first controller configured to automatically generate a controller clock signal from the external clock signal from when the at least one interrupt signal is asserted until a delivery of a corresponding output interrupt signal.