US 11,853,111 B2
System and method for controlling electrical current supply in a multi-processor core system via instruction per cycle reduction
Amitabh Mehra, Fort Collins, CO (US); Richard Martin Born, Fort Collins, CO (US); Sriram Srinivasan, Austin, TX (US); Sneha Komatireddy, Santa Clara, CA (US); Michael L Golden, Santa Clara, CA (US); Xiuting Kaleen C. Man, Austin, TX (US); Gokul Subramani Ramalingam Lakshmi Devi, Santa Clara, CA (US); and Xiaojie He, Austin, TX (US)
Assigned to ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed by ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed on Sep. 8, 2022, as Appl. No. 17/940,490.
Application 17/940,490 is a continuation of application No. 17/358,622, filed on Jun. 25, 2021, granted, now 11,460,879.
Prior Publication US 2023/0004185 A1, Jan. 5, 2023
Int. Cl. G06F 1/10 (2006.01); G06F 1/3206 (2019.01)
CPC G06F 1/10 (2013.01) [G06F 1/3206 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A controller for controlling electrical current supplied to a plurality of processing units in a multi-processor system, the controller configured to:
reduce an operating frequency for each of the plurality of processing units based on a threshold current for each of the plurality of processing units; and
based on the reduced operating frequency, reduce a number of instructions-per-cycle (IPC) for each of the plurality of processing units, based on the threshold current for each of the plurality of processing units.