US 12,498,867 B2
Storage device that secures a block for a stream or namespace and system having the storage device
Daisuke Hashimoto, Cupertino, CA (US); and Shinichi Kanno, Tokyo (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Dec. 29, 2023, as Appl. No. 18/400,866.
Application 18/400,866 is a division of application No. 17/987,449, filed on Nov. 15, 2022, granted, now 11,922,039.
Application 17/987,449 is a continuation of application No. 17/113,870, filed on Dec. 7, 2020, granted, now 11,531,480, issued on Dec. 20, 2022.
Application 17/113,870 is a continuation of application No. 16/222,948, filed on Dec. 17, 2018, granted, now 10,860,230, issued on Dec. 8, 2020.
Application 16/222,948 is a continuation of application No. 15/596,500, filed on May 16, 2017, granted, now 10,185,512, issued on Jan. 22, 2019.
Application 15/596,500 is a continuation of application No. 14/836,391, filed on Aug. 26, 2015, granted, now 9,696,935, issued on Jul. 4, 2017.
Claims priority of provisional application 62/152,372, filed on Apr. 24, 2015.
Prior Publication US 2024/0134552 A1, Apr. 25, 2024
Int. Cl. G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 16/00 (2019.01); G06F 16/18 (2019.01)
CPC G06F 3/064 (2013.01) [G06F 3/0608 (2013.01); G06F 3/061 (2013.01); G06F 3/0643 (2013.01); G06F 3/0659 (2013.01); G06F 3/0688 (2013.01); G06F 12/0253 (2013.01); G06F 16/00 (2019.01); G06F 16/1847 (2019.01)] 8 Claims
OG exemplary drawing
 
1. A memory system connectable to a host, comprising:
a nonvolatile semiconductor memory device including a plurality of blocks, each of the blocks including a plurality of memory cells; and
a memory controller configured to:
set a writing method applied to each of the blocks to one of a plurality of writing methods that are different in a number of data bits stored in each memory cell in the block;
receive a first command from the host, the first command including first information indicating an identifier of a logical address space and second information identifying one of the plurality of writing methods to be applied to the logical address space identified with the identifier;
set the one of the plurality of writing methods identified with the second information to the logical address space identified with the identifier of the first information;
receive data associated with the identifier and to be written into the nonvolatile semiconductor memory device from the host;
after receiving the first command and the data, write the received data into a first block among the plurality of blocks for which the one of the writing methods identified with the second information has been set, in accordance with the one of the writing methods identified with the second information; and
after the data is erased from the first block, change the writing method set for the first block to a different one of the plurality of writing methods.