US 11,844,256 B2
Display device including third conductive layer directly contacting first conductive layer and second conductive layer
Dongmin Lee, Anyang-si (KR); Taewook Kang, Seongnam-si (KR); Hyunah Sung, Suwon-si (KR); Sukyoung Yang, Hwaseong-si (KR); Dokeun Song, Yongin-si (KR); and Hyuneok Shin, Gwacheon-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., Ltd., Yongin-Si (KR)
Filed on Jun. 30, 2021, as Appl. No. 17/363,496.
Claims priority of application No. 10-2020-0151387 (KR), filed on Nov. 12, 2020.
Prior Publication US 2022/0149143 A1, May 12, 2022
Int. Cl. H01L 29/08 (2006.01); H10K 59/131 (2023.01); C22C 21/00 (2006.01); H10K 59/126 (2023.01); H10K 59/121 (2023.01); H10K 77/10 (2023.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); H10K 59/12 (2023.01); H10K 102/00 (2023.01)
CPC H10K 59/1315 (2023.02) [C22C 21/00 (2013.01); H10K 59/126 (2023.02); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 77/111 (2023.02); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1222 (2013.01); H01L 27/1255 (2013.01); H01L 29/66757 (2013.01); H01L 29/78675 (2013.01); H10K 59/1201 (2023.02); H10K 2102/311 (2023.02)] 17 Claims
OG exemplary drawing
 
1. A display device comprising:
a base substrate;
a buffer layer disposed on the base substrate;
an active layer disposed on the buffer layer;
a first gate insulation layer disposed on the active layer;
a first conductive layer disposed on the first gate insulation layer and which is a single-layer including an aluminum alloy;
a second gate insulation layer disposed on the first conductive layer;
a second conductive layer disposed on the second gate insulation layer and which is a single-layer including an aluminum alloy;
an insulation interlayer disposed on the second conductive layer; and
a third conductive layer disposed on the insulation interlayer, directly contacting the first conductive layer through a first gate contact hole defined in the insulation interlayer and the second gate insulation layer, and directly contacting the second conductive layer through a second gate contact hole defined in the insulation interlayer,
wherein a thickness of a first portion of the first conductive layer which directly contacts the third conductive layer is less than a thickness of a second portion of the first conductive layer which does not directly contact the third conductive layer.