US 11,844,217 B2
Methods for forming multi-layer vertical nor-type memory string arrays
Scott Brad Herner, Portland, OR (US); Wu-Yi Henry Chien, San Jose, CA (US); Jie Zhou, San Jose, CA (US); and Eli Harari, Saratoga, CA (US)
Assigned to SUNRISE MEMORY CORPORATION, San Jose, CA (US)
Filed by SUNRISE MEMORY CORPORATION, San Jose, CA (US)
Filed on Feb. 10, 2022, as Appl. No. 17/669,024.
Application 17/669,024 is a division of application No. 16/707,920, filed on Dec. 9, 2019, granted, now 11,282,855.
Claims priority of provisional application 62/777,000, filed on Dec. 7, 2018.
Prior Publication US 2022/0165751 A1, May 26, 2022
Int. Cl. H10B 43/27 (2023.01); H01L 21/3213 (2006.01); H01L 21/311 (2006.01)
CPC H10B 43/27 (2023.02) [H01L 21/31144 (2013.01); H01L 21/32139 (2013.01); H01L 21/31116 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method for high aspect ratio etching, comprising:
preparing above a surface of a semiconductor substrate a plurality of multi-layers, stacked one on top of another along a first direction substantially orthogonal to the surface of the semiconductor substrate, wherein each multi-layer comprising a first layer and a second layer, wherein the first layer comprises a first dielectric material and the second layer comprises a first material;
patterning and etching the multilayers along the first direction using a first mask to form a first set of trenches that divide the multi-layers into a first group of multi-layer stacks, wherein each of the first set of trenches extends along a second direction substantially parallel to the surface of the semiconductor substrate;
filling the first set of trenches with a second dielectric material;
patterning and etching the first group of multi-layer stacks along the first direction using a second mask to form a second set of trenches that create, out of the first group of multi-layer stacks, a second group of multi-layer stacks, wherein each of the second set of trenches extends along the second direction parallel the first set of trenches;
filling the second set of trenches with the second dielectric material; and
selectively etching a first portion of the second dielectric material in the first and second sets of trenches to provide a first plurality of shafts that extends along the first direction;
depositing a semiconductor layer of a first conductivity conformally; and
filling each shaft with a third dielectric material.