US 11,844,208 B2
Semiconductor device and method of forming the same
Mitsunari Sukekawa, Hiroshima (JP); Hiroshi Toyama, Sagamihara (JP); Hiroyuki Uno, Chigasaki (JP); and Yasutaka Okada, Hiroshima (JP)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Feb. 23, 2022, as Appl. No. 17/678,595.
Prior Publication US 2023/0269932 A1, Aug. 24, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/315 (2023.02) [H10B 12/0335 (2023.02); H10B 12/34 (2023.02); H10B 12/50 (2023.02)] 5 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a base structure having a first portion including a plurality of transistors and a second portion surrounding the first portion;
a storage structure on the first portion of the base structure, the storage structure including a plurality of storage capacitors each coupled to a corresponding one of the plurality of transistors;
an interface structure on the second portion of the base structure; and
a peripheral structure on the interface structure;
wherein the interface structure is divided into a plurality of insulating films and the plurality of insulating films are arranged away from each other to have a plurality of voids between the second portion of the base structure and the peripheral structure.