| CPC H10B 12/30 (2023.02) [H01L 29/0649 (2013.01); H10B 12/03 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] | 9 Claims |
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1. A semiconductor device, comprising:
a plurality of active layers vertically stacked over a substrate;
a plurality of bit lines connected to first ends of the active layers, respectively, and extended parallel to the substrate;
line-shape air gaps disposed between the bit lines;
a plurality of capacitors connected to second ends of the active layers, respectively;
a word line and a vertical shape air gap facing each other with the active layers interposed therebetween, the word line and the vertical shape air gap are vertically oriented from the substrate; and
a gap capping layer capping an upper surface of the vertical shape air gap.
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