CPC H03L 7/085 (2013.01) [H03L 7/081 (2013.01); H05B 47/10 (2020.01)] | 20 Claims |
1. An optoelectronic system for an electronic device, the optoelectronic system comprising:
a transmit side comprising:
a phase-locked loop configured to:
receive, as input, a system clock signal;
decimate the system clock signal to a decimated input signal;
oversample the decimated input signal to an oversampled clock signal;
decimate the oversampled clock signal to a sampling signal; and
decimate the sampling signal to a frequency of the decimated input signal;
a shift register configured to receive the sampling signal and, in response, output a sequence of digital values;
a converter configured to receive the sequence of digital values and to output a current corresponding to each value of the sequence of digital values;
a delay-locked loop configured to receive current output from the converter and to apply a phase delay thereto; and
a light-emitting element configured to receive as input output from the delay-locked loop.
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