US 11,843,053 B2
Semiconductor devices
Su Jin Jung, Hwaseong-si (KR); Ki Hwan Kim, Seoul (KR); Sung Uk Jang, Hwaseong-si (KR); and Young Dae Cho, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD.
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 10, 2021, as Appl. No. 17/398,550.
Claims priority of application No. 10-2020-0170065 (KR), filed on Dec. 8, 2020.
Prior Publication US 2022/0181499 A1, Jun. 9, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 21/0259 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an active pattern comprising a lower pattern and a plurality of sheet patterns, the plurality of sheet patterns spaced apart from the lower pattern in a first direction;
a source/drain pattern on the lower pattern and in contact with the plurality of sheet patterns; and
a gate structure on opposing sides of the source/drain pattern in a second direction different from the first direction, the gate structure comprising a gate electrode on the plurality of sheet patterns,
wherein the source/drain pattern comprises an epitaxial region that comprises a semiconductor material and a cavity region that is inside the epitaxial region and that is entirely surrounded by the semiconductor material.